IviFgen Configure Sample Clock Output Enabled [SC] VI
IviFgenSampleClock [SC] Capability Group
This VI configures whether the sample clock appears at the sample clock output of the generator.
![IviFgen Configure Sample Clock Output Enabled [SC].vi](ivifgen_configure_sample_clock_output_enabled_[sc]c.gif)
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instrument handle The instrument handle that you obtain from the IviFgen Initialize or IviFgen Initialize With Options VI. |
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instrument handle out The instrument handle that you obtain from the IviDigitizer Initialize VI or IviDigitizer Initialize With Options VI. The handle identifies a particular instrument session. Default Value: None |
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sample clock output enabled (Disabled) Pass whether you want sample clock to appear at the sample clock output of the generator. The driver sets the IviFgen Sample Clock Output Enabled [SC] property to this value. Valid Values: VI_TRUE—Enable the sample clock output VI_FALSE—Disable the sample clock output Default Value: VI_TRUE |
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error in (no error) The error in cluster can accept error information wired from VIs previously called. Use this information to decide if any functionality should be bypassed in the event of errors from other VIs. The pop-up option Explain Error (or Explain Warning) gives more information about the error displayed. |
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error out The error out cluster passes error or warning information out of a VI to be used by other VIs. The pop-up option Explain Error (or Explain Warning) gives more information about the error displayed. |